Pinned Repositories
e200_opensource
The Ultra-Low Power RISC Core
hw
RTL, Cmodel, and testbench for NVDLA
ibex
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
learngit
riscv-dv
SV/UVM based instruction generator for RISC-V processor verification
riscv-tests
hyyu0512's Repositories
hyyu0512/e200_opensource
The Ultra-Low Power RISC Core
hyyu0512/hw
RTL, Cmodel, and testbench for NVDLA
hyyu0512/ibex
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
hyyu0512/learngit
hyyu0512/riscv-dv
SV/UVM based instruction generator for RISC-V processor verification
hyyu0512/riscv-tests