This repository contains a collection of projects completed as part of the Computer Aided Design (CAD) Course at UT-CE in Fall 2023. The projects involve implementing various neural networks and logic designs in hardware form. Each project covers different aspects of CAD, from implementing neural networks with IEEE 754 standards to designing FPGA logic circuits.
Description: In this project, we implemented a Maxnet Neural Network in hardware form using floating-point arithmetic. We designed and implemented adders and multipliers that conform to the IEEE 754 standards to handle floating-point numbers efficiently.
Features:
- Implementation of Maxnet Neural Network in hardware.
- Design of IEEE 754 compliant floating-point adders and multipliers.
Description: This project involved redesigning the Maxnet Neural Network using basic logic gates, making it more suitable for synthesis with FPGA devices. We focused on understanding and simulating the synthesis process to optimize the design for FPGA implementation.
Features:
- Redesign of Maxnet Neural Network using logic gates.
- FPGA synthesis optimization.
Description: In this two-phase project, we implemented a Convolutional Neural Network (CNN) in hardware form. In the first phase, we implemented a single layer of the CNN. In the second phase, we developed an infrastructure to support multiple layers, creating a more realistic and functional CNN.
Features:
- Phase 1: Implementation of a single CNN layer in hardware.
- Phase 2: Development of infrastructure to support multiple CNN layers.
Feel free to fork this repository, open issues, or submit pull requests. Any contributions are welcome!