ionescu007/SimpleVisor

Question about "UINT64 PageFrameNumber : 36"

Opened this issue · 3 comments

wbenny commented

Hi,
In VMX_EPTP, VMX_EPML4E, VMX_PDPTE, MTRR_VARIABLE_BASE & MTRR_VARIABLE_MASK structures, there is a member defined as:
UINT64 PageFrameNumber : 36

Intel manual says size of this field should be MAXPHYADDR, which is obtained by CPUID.80000008H:EAX[7:0] (39 on my machine).

Intel also says:

the width is generally 36 if CPUID.01H:EDX.PAE [bit 6] = 1 and 32 otherwise.)
... MAXPHYADDR is at most 52

My question is: couldn't this cause problems (assuming the available RAM is really, really big) & wouldn't it be better to simply define this field as:
UINT64 PageFrameNumber : 52
?

I assume "unused" bits are set to 0 anyway.

ionescu007 commented
hypervisor commented

Hey, I had the same question in mind a while ago, why did you decide against this in your hypervisor? https://github.com/wbenny/hvpp/blob/master/src/hvpp/hvpp/ia32/paging.h#L78 here you hardcode 36 bits, is this because of something you discovered or does it just not really matter?

wbenny commented

Hi @DXGKRNL, I generated the structs automatically using my other project - https://github.com/wbenny/ia32-doc. In my case, the 36 ended up there because I hardcoded MAXPHYADDR = 48 before generation. Explanation is in the comments https://github.com/wbenny/ia32-doc/blob/3acb567dae0325e889881105d528795f1aa8b237/ia32doc/doc.py#L31

Hope it helps.

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