/Verilog

Basic and simple Verilog programs with testbench

Primary LanguageVerilog

ModelSim-Verilog

Basic Verilog programs with TestBench

  • multiplexer 2 to 1 (Mux 2 to 1)
  • multiplexer 4 to 1 (Mux 4 to 1)
  • multiplexer 4 to 1 8 bit (Mux 4 to 1)
  • Half Adder
  • Full Adder
  • Full Adder 8 bit
  • Full Adder with two half adder
  • Logic Unit