janestreet/hardcaml

Issues

• Yosys compat: need to include SystemVerilog reserved keywords in Reserved_words

  #21 opened 2 months ago by edwintorok
  1

• Failed to install opam core_unix on Amazon EC2

  #17 opened 2 years ago by shanhx2000
  1

• Add "debug" signals to circuits

  #14 opened 2 years ago by askvortsov1
  1

• Simulating write-before-read memory

  #11 opened 3 years ago by askvortsov1
  6

• Use of Variants/Enums for internal signals

  #10 opened 3 years ago by askvortsov1
  6

• Serial multiplier example - can't seem to get it working

  #8 opened 4 years ago by georgejkaye
  7

• Documentation

  #4 opened 4 years ago by jserot
  2

• Help with design low-level HDL language

  #3 opened 4 years ago by XVilka
  3

• Document Required

  #2 opened 4 years ago by abhisheietk
  2

• Installation Error

  #1 opened 6 years ago by abhisheietk
  2