jasommer

FPGA_DSP

hybrid-snn-conversion

Training spiking networks with hybrid ann-snn conversion and spike-based backpropagation

keras-vis

Neural network visualization toolkit for keras

MIPS_CPU

Simple VHDL implementation of a simple microprocessor without interlocked pipeline stages

Network-on-Chip-in-VHDL

notebooks

Repository that contains my research

SimpleCPU

A very simple implementation of a general purpose 12 bit RISC CPU for educational purposes.

snn_toolbox

Toolbox for converting analog to spiking neural networks (ANN to SNN), and running them in a spiking neuron simulator.

spiking-neural-network

code demos for primitives of spiking neural networks

verilog_iterative_division

This module implements a 32-bit division method that significantly helps to save hardware resources. Compared to a hardware divider that is implemented using CLBs, this method uses five times less hardware resources. This comes at the expense of reduced speed: Depending on the inputs, this algorithm might take a significant amount of time to compute the quotient.

jasommer/verilog_iterative_division

This module implements a 32-bit division method that significantly helps to save hardware resources. Compared to a hardware divider that is implemented using CLBs, this method uses five times less hardware resources. This comes at the expense of reduced speed: Depending on the inputs, this algorithm might take a significant amount of time to compute the quotient.

jasommer/SimpleCPU

A very simple implementation of a general purpose 12 bit RISC CPU for educational purposes.

jasommer/FPGA_DSP

jasommer/hybrid-snn-conversion

Training spiking networks with hybrid ann-snn conversion and spike-based backpropagation

jasommer/keras-vis

Neural network visualization toolkit for keras

jasommer/MIPS_CPU

Simple VHDL implementation of a simple microprocessor without interlocked pipeline stages

jasommer/Network-on-Chip-in-VHDL

jasommer/notebooks

Repository that contains my research

jasommer/snn_toolbox

Toolbox for converting analog to spiking neural networks (ANN to SNN), and running them in a spiking neuron simulator.

jasommer/spiking-neural-network

code demos for primitives of spiking neural networks

jasommer/vhdl_syntax_checker

Xilinx ISE's code editor is quite dated and does not hold up to todays standards. A better alternative is e.g. NotePad++, however it does not have syntax checking functionality. In order to check for syntax errors you would have to switch back and forth between NP++ and ISE which is annoying. The scripts presented here allow syntax checking by just pressing a keyboard shortcut (e.g. F9).)