A FPGA design (in Verilog) for the DE10-Nano that reads 12-bit samples from the on-board ADC and sends them to UART0 (the mini USB socket for the UART-USB).
In summary, it does the following all within in the FPGA fabric:
- Repeatedly reads Channel 0 ADC sample data from the ADC LTC2308 chip over SPI serial communication
- A loop sends a read (when ready) to the existing HPS UART0 (UART-USB) which is wired to the HPS side
Note, there is an ADC demo on the Terasic DE10-Nano CD zip file, but it uses the NIOS II FPGA softcore processor (instead of the hardware ARM) and also a custom Platform Designer ADC IP. My version is more plain and perhaps more useful for a beginner.
- Write the sdcard_de10nano.img to a micro SD card. Use any of these:
- Win32 Disk Imager (https://sourceforge.net/projects/win32diskimager/)
- Rufus (https://rufus.ie/en/)
- balenaEtcher (https://www.balena.io/etcher/)
- Connect a USB cable between the UART-USB connector on the DE10-Nano and your computer
- Start a serial console program such as PuTTY and set it to serial mode, 115200 baud, 8 data bits, 1 stop bit, no parity, no control flow
- Insert the micro SD card into the DE10-Nano and turn on the 5V power supply
- Wait for U-Boot to boot up. You should see a bunch of U-Boot messages and then stop with a console prompt
- The 12-bit sample reads are displayed in hex format
Note, I've configured U-Boot to boot only to the console prompt.
A Quartus Prime Lite Verilog HDL project:
| File | Description |
|---|---|
| sdcard_image/sdcard_de10nano.img | A prebuilt SD card image |
| adc_f2h_uart.qpf | Quartus Prime Lite project file |
| adc_f2h_uart.qsf | Quartus Prime Lite settings file |
| top.v | Top level Verilog file |
| adc_ltc2308.v | ADC LTC2308 module |
| uart_dev.v | HPS UART module |
| rd_axi.v | Basic read axi helper module |
| wr_axi.v | Basic write axi helper module |