/tt05-hodgkin-huxley

A Silicon Hodgkin-Huxley Neuron on TinyTapeout

Primary LanguageVerilogApache License 2.0Apache-2.0

What is Tiny Tapeout?

TinyTapeout is an educational project that aims to make it easier and cheaper than ever to get your digital designs manufactured on a real chip.

To learn more and get started, visit https://tinytapeout.com.

Verilog Projects

Edit the info.yaml and uncomment the source_files and top_module properties, and change the value of language to "Verilog". Add your Verilog files to the src folder, and list them in the source_files property.

The GitHub action will automatically build the ASIC files using OpenLane.

How to enable the GitHub actions to build the ASIC files

Please see the instructions for:

Resources

What next?