Pinned Repositories
AGILE
aha
https://aha.readthedocs.io/en/latest/
ara
The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 core
cde
A Scala library for Context-Dependent Environments
CGRA
cgra_mapping
CHARM
CHARM: Composing Heterogeneous Accelerators for Matrix Multiply on Versal ACAP Architecture (Full Paper accepted to FPGA2023!)
llvm-project
MachSuite
Benchmarks for Accelerator Design and Customized Architectures
scalehls
A scalable High-Level Synthesis framework on MLIR
jiangnan7's Repositories
jiangnan7/AGILE
jiangnan7/cgra_mapping
jiangnan7/scalehls
A scalable High-Level Synthesis framework on MLIR
jiangnan7/aha
https://aha.readthedocs.io/en/latest/
jiangnan7/ara
The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 core
jiangnan7/cde
A Scala library for Context-Dependent Environments
jiangnan7/CGRA
jiangnan7/CHARM
CHARM: Composing Heterogeneous Accelerators for Matrix Multiply on Versal ACAP Architecture (Full Paper accepted to FPGA2023!)
jiangnan7/llvm-project
jiangnan7/MachSuite
Benchmarks for Accelerator Design and Customized Architectures
jiangnan7/mlir-aie
An MLIR-based toolchain for Xilinx Versal AIEngine-based devices.
jiangnan7/PandA-bambu
PandA-bambu public repository
jiangnan7/Polygeist
C/C++ frontend for MLIR. Also features polyhedral optimizations, parallel optimizations, and more!
jiangnan7/SPARTA
jiangnan7/torch-mlir
The Torch-MLIR project aims to provide first class support from the PyTorch ecosystem to the MLIR ecosystem.
jiangnan7/vicuna
RISC-V Zve32x Vector Coprocessor
jiangnan7/yosys
Yosys Open SYnthesis Suite