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Hardware
Fuses
- Table 30-4. Fuse High Byte [1]
| Fuse High Byte |
Bit No |
Description |
Default Value |
Value Used |
| OCDEN |
7 |
Enable OCD |
1 (unprogrammed, OCD disabled) |
1 |
| JTAGEN |
6 |
Enable JTAG |
0 (programmed, JTAG enabled) |
1 |
| SPIEN |
5 |
Enable Serial Program & Data Downloading |
0 (programmed) |
0 |
| WDTON |
4 |
Watchdog Timer always on |
1 (unprogrammed) |
1 |
| EESAVE |
3 |
EEPROM memory is preserved through Chip Erase |
1 (unprogrammed) |
1 |
| BOOTSZ1 |
2 |
Select Boot Size (see table 29-13) |
0 (programmed) |
0 |
| BOOTSZ0 |
1 |
Select Boot Size (see table 29-13) |
0 (programmed) |
0 |
| BOOTRST |
0 |
Select Reset Vector |
1 (unprogrammed) |
1 |
|
|
|
0x99 |
0x99 |
- Table 30-5. Fuse Low Byte [1]
| Fuse Low Byte |
Bit No |
Description |
Default Value |
Value Used |
| CKDIV8 |
7 |
Divide clock by 8 |
0 (programmed) |
1 |
| CKOUT |
6 |
Clock output |
1 (unprogrammed) |
1 |
| SUT1 |
5 |
Select start-up time |
1 (unprogrammed) |
1 |
| SUT0 |
4 |
Select start-up time |
0 (programmed) |
0 |
| CKSEL3 |
3 |
Select Clock source |
0 (programmed) |
0 |
| CKSEL2 |
2 |
Select Clock source |
0 (programmed) |
0 |
| CKSEL1 |
1 |
Select Clock source |
1 (unprogrammed) |
1 |
| CKSEL0 |
0 |
Select Clock source |
0 (programmed) |
0 |
|
|
|
0x62 |
0xE2 |
External Libraries for Help
What is this repository for?
How do I get set up?
- Summary of set up
- Configuration
- Dependencies
- Database configuration
- How to run tests
- Deployment instructions
Who do I talk to?
Thanks to
Sources
[1] ATmega640/1280/1281/2560/2561 datasheet