Issues
- 0
Fix the behavior of non-combin memory
#159 opened by hnpl - 0
Fix non-combinational pipelined cpu
#155 opened by hnpl - 0
Add a diagram for single-cycle dinocpu
#154 opened by hnpl - 1
Fix first-hardware.md missing import
#144 opened by hnpl - 1
Upstream fix for #120
#145 opened by hnpl - 1
Fix PC width issue
#147 opened by hnpl - 1
Support rv64i
#149 opened by hnpl - 0
Fix test commands in Lab tests
#146 opened by hnpl - 0
Update docker container for gradescope
#143 opened by hnpl - 1
Question about Local Branch Predictor
#141 opened by itviewer - 9
- 0
Merge improvements from sq20
#131 opened by powerjg - 0
Move default branch to main from master
#133 opened by powerjg - 3
Update Chisel to 3.4
#136 opened by powerjg - 0
Fix diagram for assignment 3
#134 opened by powerjg - 1
Migrate from travis to github actions
#132 opened by powerjg - 0
- 0
Add documentation for stage registers
#118 opened by powerjg - 5
Chisel Notes: First Hardware discrepancy
#130 opened by johnzl-777 - 4
Fix Treadle output directory bug
#84 opened by jardhu - 0
Tests to add
#122 opened by powerjg - 2
- 0
Make pipeline registers print pretty
#113 opened by powerjg - 1
Add example single stepping with register
#90 opened by powerjg - 4
Make sure debug printing is consistent
#59 opened by powerjg - 0
Remove debug statements in the chisel
#108 opened by powerjg - 0
Add dumpAllInfo function to Tester
#107 opened by powerjg - 0
Add special bubble symbol
#89 opened by powerjg - 2
build.sbt uses unresolved jelf dependency
#110 opened by jardhu - 0
Hook disassembler into new REPL interface
#64 opened by powerjg - 0
CSR implementation uses deprecated functions
#105 opened by powerjg - 1
More detailed test output
#52 opened by DanG100 - 1
Fix DontCares
#80 opened by powerjg - 0
- 1
Update docker and singularity containers
#99 opened by powerjg - 0
Use Chisel release 3.2.0
#93 opened by powerjg - 0
Convert travis to gh actions
#102 opened by powerjg - 4
Move pipeline code to dinocpu.pipelined package
#94 opened by jardhu - 2
Create hierarchy in classes
#86 opened by powerjg - 0
- 4
Add a pipeline stage register interface and module
#91 opened by jardhu - 3
Bug in reading bytes/halfwords
#54 opened by powerjg - 1
- 2
Clean things up for DINO CPU release
#66 opened by powerjg - 0
split branch prediction CPU into its own file
#61 opened by powerjg - 0
- 0
Remove the five cycle design
#51 opened by powerjg - 0
peeking and poking csr signals for testing doesnt work because csr io and regfile is renamed in testing unfriendly way
#60 opened by nganjehloo - 4
- 1
Add checks for unaligned/illegal memory accesses
#53 opened by powerjg