Company Website: https://www.jlsemi.com
Location: Zhangjiang Hi-Tech Park, Shanghai, China
Jinglue Semi. is a privately-funded fabless company founded in 2008. Members of the Jinglue management team respectively has over 20 years of semiconductor-relevant expertise. The company focus on developing high performance communication ICs and system in IIoT and automotive applications.
As a team member to Design and Verify the PHY/Switch/SoC System
- Major in EE, CS or related
- Familiar with Verilog or SystemVerilog or Chisel
- Experiences on verification on FPGA and familiar with FPGA EDA tools is a plus
- Program development in TCL/Python/... to improve productivity
- As a team member to Design and Verify the PHY/Switch/SoC System
- Work together with verification team to guaranteed the quality of PHY/Switch/SoC System design
- Major in EE, CS or related
- Familiar with Verilog or SystemVerilog or Chisel
- Less then 2 years working exprience
- Familiar with System-Verilog and UVM verification methodology is a plus
- Program development in TCL/Python/... to improve productivity
- As a team member to Design and Verify the PHY/Switch/SoC System
- Work together with verification team to guaranteed the quality of PHY/Switch/SoC System design
- Major in EE, CS or related
- Familiar with Verilog or SystemVerilog or Chisel
- More than 2 years Working Exprience
- Experiences on verification on FPGA and familiar with FPGA EDA tools is a plus
- Program development in TCL/Python/... to improve productivity
- Familiar with HW/SW interface, any CPU ISA like RISC-V/ARM/MIPS/... is a plus
- As a team member to Design and Verify the PHY/Switch/SoC System
- Work together with design team to develop testplan and testcases for PHY/Switch/SoC System
- Develop checker/driver and test cases to verify PHY/Switch/SoC System
- Major in EE, CS or related
- Familiar with Verilog or SystemVerilog or Chisel
- Less then 2 years working exprience
- Familiar with System-Verilog and UVM verification methodology
- Program development in TCL/Python/... to improve productivity
- As a team member to Design and Verify the PHY/Switch/SoC System
- Work together with design team to develop testplan and testcases for PHY/Switch/SoC System
- Maintain and help improve UVM based verification environment
- Develop checker/driver and test cases to verify PHY/Switch/SoC System
- Major in EE, CS or related
- Familiar with Verilog or SystemVerilog or Chisel
- More than 2 years Working Exprience
- Familiar with System-Verilog and UVM verification methodology
- Program development in TCL/Python/... to improve productivity
- As a team member to Design and Verify the PHY/Switch/SoC System on FPGA
- Maintain and help improve FPGA verification platform
- Work together with design team to develop testplan and testcases for PHY/Switch/SoC System
- Major in EE, CS or related
- Experience on use Xilinx/Intel EDA Tools
- Familiar with Verilog or SystemVerilog or Chisel
- Familiar with TCL/Python/... is a good
- 管理和维护公司的IT基础设施
- 负责公司网络及其设备的监控，维护，管理工作，确保安全稳定运行
- 安装和维护公司计算机、应用软件等，为业务部门提供软硬件技术支持
- 管理各类IT费用和预算，负责及设备采购
- 熟悉各类常见软件的使用和硬件的
- 有熟悉和掌握Linux操作者优先
- 有Python等脚本编程经验者优先
- 认真负责、乐于团队合作、有耐心
- 参与公司基于私有云和公有云的平台架构的开发和测试
- 负责公司现有平台的维护，确保其安全稳定问题
- 计算机等相关专业，学历不限
- 精通某种编程语言（如Python/Go等），有独立完成项目的能力
- 熟悉git等版本控制软件的操作
- 熟悉Linux及相关操作
- 熟悉Web 系统的开发和运维者优先
- 了解AWS/阿里云的组件及功能，有AWS或阿里云运维或使用经验优先
- As a team member to IT Platform based on Private/Public Cloud
- Build, maintain, and monitor existed platform
- Bachelor Degree in Computer Science, or related field
- Proficient in and programming language, such as Python, Go, etc...
- Familiar with Linux operation system
- Familiar with Git version control system
- Familiar with OpenStack/AWS/Aliyun API is a good plus
- Good interpersonal skills, Self-driven personality, positive thinking and self - confident
Please send your cover letter and pdf resume to hr@jlsemi.com.