Pinned Repositories
cnn-bnn
Design project
administrative-divisions-of-China-on-Python
中华人民共和国行政区划爬虫，分为省级、地级、县级、乡级、村级，最多五级连动，可通过本项目自行爬取数据也可使用本项目在线接口直接调用。
album
APT-ProvenanceGraph
该资源是各种溯源图相关的论文和资源总结（含PPT），涉及APT攻击检测、入侵检测、流量日志检测、系统安全等领域，希望对大家有所帮助~
camflow-cli
Command Line Tool for CamFlow Linux Provenance capture
camflow-dev
Generates kernel patch for CamFlow Linux Provenance Capture.
Detectron
FAIR's research platform for object detection research, implementing popular algorithms like Mask R-CNN and RetinaNet.
ece4750-tut2-git
ECE 4750 Tutorial 2: Git Distributed Version Control System
ece4750-tut4-verilog
ECE 4750 Tutorial 4: Verilog Hardware Description Language
Guage
guage detection and analyse
jpdz's Repositories
jpdz/pengjiang
jpdz/NICPROV
jpdz/provenance_pkuoslab
jpdz/APT-ProvenanceGraph
该资源是各种溯源图相关的论文和资源总结（含PPT），涉及APT攻击检测、入侵检测、流量日志检测、系统安全等领域，希望对大家有所帮助~
jpdz/camflow-dev
Generates kernel patch for CamFlow Linux Provenance Capture.
jpdz/camflow-cli
Command Line Tool for CamFlow Linux Provenance capture
jpdz/sysdig
Linux system exploration and troubleshooting tool with first class support for containers
jpdz/prov-web
jpdz/PhDDoc
北京大学博士学位研究生学科综合考试报告Tex参考模板
jpdz/pkuthss
LaTeX template for dissertations in Peking University
jpdz/nuttx-for-tensorflow
transplant tensorflow to nuttx
jpdz/Guage
guage detection and analyse
jpdz/log-reducer
An efficient, online log reduction algorithm for the Linux Audit system that guarantees full forward and backward trackability. Implementation of "High Fidelity Data Reduction for Big Data Security Dependency Analyses" by Xu, Zhang, et. al. Found here: https://www.eecis.udel.edu/~hnw/paper/ccs16b.pdf
jpdz/administrative-divisions-of-China-on-Python
中华人民共和国行政区划爬虫，分为省级、地级、县级、乡级、村级，最多五级连动，可通过本项目自行爬取数据也可使用本项目在线接口直接调用。
jpdz/Detectron
FAIR's research platform for object detection research, implementing popular algorithms like Mask R-CNN and RetinaNet.
jpdz/album
jpdz/cnn-bnn
Design project
jpdz/ece4750-tut2-git
ECE 4750 Tutorial 2: Git Distributed Version Control System
jpdz/ece4750-tut4-verilog
ECE 4750 Tutorial 4: Verilog Hardware Description Language