FPGA-Trace
An FPGA accelerated ray tracer, implemented in C++ and using High Level Synthesis (HLS) for hardware design, running on the Xilinx Zedboard SoC.
PROPOSAL - CHECKPOINT - FINAL
An FPGA accelerated ray tracer, implemented in C++ and using High Level Synthesis (HLS) for hardware design, running on the Xilinx Zedboard SoC.
PROPOSAL - CHECKPOINT - FINAL