karthickeaswar

VLSI Design Engineer// Physical Design Engineer// RF Engineer// Cloud Engineer// Advanced Simulation Expert

PSNA COLLEGE OF ENGINEERING AND TECHNOLOGYDINDUGAL

Pinned Repositories

Analog-to-Digital-Convertor
Language:Shell00
CAPSTONE-PROJECT
00
Clock-Multiplier
Language:C00
DIGITAL-DELAY---TIMER
Language:HTML00
DUAL-PORT-RAM
Language:C00
ECG-APPLICATION
Language:HTML00
portfolio-master
Language:HTML00
Sample-bot-2
Language:HTML00
SAMPLE-WEBSITE
Language:HTML00
Sequential-Detector
Language:C00

karthickeaswar's Repositories

karthickeaswar/Analog-to-Digital-Convertor
Language:Shell00
karthickeaswar/CAPSTONE-PROJECT
00
karthickeaswar/Clock-Multiplier
Language:C00
karthickeaswar/DIGITAL-DELAY---TIMER
Language:HTML00
karthickeaswar/DUAL-PORT-RAM
Language:C00
karthickeaswar/ECG-APPLICATION
Language:HTML00
karthickeaswar/portfolio-master
Language:HTML00
karthickeaswar/Sample-bot-2
Language:HTML00
karthickeaswar/SAMPLE-WEBSITE
Language:HTML00
karthickeaswar/Sequential-Detector
Language:C00
karthickeaswar/UIPATH
Language:HTML