kartikp4892

Pinned Repositories

BLOCX
Language:C++00
ergo
Ergo protocol description & reference client implementation
Language:Scala00
esp-idf
Espressif IoT Development Framework. Official development framework for Espressif SoCs.
Language:C00
hdlbits
00
SpinalHDL
Scala based HDL
Language:Scala0 0 00
Tbps_CRC_spinal
A SytemVerilog implementation of Cyclic Redundancy Check runs at up to Terabits per second
Language:SystemVerilog1 1 00
vk
0 1 00
zephyr
Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.
Language:C00
SpinalHDL
Scala based HDL
Language:Scala1.7k 80 740329

kartikp4892's Repositories

kartikp4892/Tbps_CRC_spinal
A SytemVerilog implementation of Cyclic Redundancy Check runs at up to Terabits per second
Language:SystemVerilog1 1 00
kartikp4892/BLOCX
Language:C++00
kartikp4892/ergo
Ergo protocol description & reference client implementation
Language:Scala00
kartikp4892/esp-idf
Espressif IoT Development Framework. Official development framework for Espressif SoCs.
Language:C00
kartikp4892/hdlbits
00
kartikp4892/SpinalHDL
Scala based HDL
Language:Scala0 0 00
kartikp4892/vk
0 1 00
kartikp4892/zephyr
Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.
Language:C00