kingstar2020sdu

kingstar2020sdu's Stars

• binary-husky/gpt_academic

  为GPT/GLM等LLM大语言模型提供实用化交互接口，特别优化论文阅读/润色/写作体验，模块化设计，支持自定义快捷按钮&函数插件，支持Python和C++等项目剖析&自译解功能，PDF/LaTex论文翻译&总结功能，支持并行问询多种LLM模型，支持chatglm3等本地模型。接入通义千问, deepseekcoder, 讯飞星火, 文心一言, llama2, rwkv, claude2, moss等。

  Language:Python65.2k2781.6k8k

• PKUFlyingPig/cs-self-learning

  计算机自学指南

  Language:HTML57.2k3181826.8k

• Asabeneh/30-Days-Of-Python

  30 days of Python programming challenge is a step-by-step guide to learn the Python programming language in 30 days. This challenge may take more than100 days, follow your own pace. These videos may help too: https://www.youtube.com/channel/UC7PNRuno1rzYPb1xLa4yktw

  Language:Python42.3k8151488.1k

• chatanywhere/GPT_API_free

  Free ChatGPT API Key，免费ChatGPT API，支持GPT4 API（免费），ChatGPT国内可用免费转发API，直连无需代理。可以搭配ChatBox等软件/插件使用，极大降低接口使用成本。国内即可无限制畅快聊天。

  Language:Python23.6k1172851.8k

• adam-maj/tiny-gpu

  A minimal GPU design in Verilog to learn how GPUs work from the ground up

  Language:SystemVerilog7k6824530

• ikaijua/Awesome-AITools

  Collection of AI-related utilities. Welcome to submit issues and pull requests /收藏AI相关的实用工具，欢迎提交issues 或者pull requests

  4.4k409293

• cruxopen/openISP

  Image Signal Processor

  Language:Python1.1k2919398

• shuhongfan/TyporaCrack

  Typora V1.6.7 Typora Crack Typora破解 Typora 激活 Typora activation MD Markdown editor 激活

  1k1026239

• jhfmat/ISP-pipeline-hdrplus

  Denoise,HDR,Isppipeline,Image-processing(图形处理),camera, Isp ,HDRplus

  Language:C803814204

• dhm2013724/yolov2_xilinx_fpga

  A demo for accelerating YOLOv2 in xilinx's fpga pynq/zedboard

  Language:C77922126232

• lvyufeng/step_into_mips

  一步一步写MIPS CPU

  Language:Verilog740182155

• xiaop1/Verilog-Practice

  HDLBits website practices & solutions

  Language:Verilog685116178

• IBM/AccDNN

  A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.

  Language:Verilog3942514101

• omarelhedaby/CNN-FPGA

  Implementation of CNN on ZYNQ FPGA to classify handwritten numbers using MNIST database

  Language:Verilog3831291

• adki/AMBA_AXI_AHB_APB

  AMBA bus lecture material

  Language:Verilog37380125

• faustomorales/vit-keras

  Keras implementation of ViT (Vision Transformer)

  Language:Python33883880

• cxlisme/FPGA-proj

  FPGA project

  Language:VHDL2001246

• doonny/basic_knowledge

  Things to learn for new students in the Lab for AI chips and systems of BJTU .

  Language:Python1618034

• Starrynightzyq/Nexys4DDR-ARM-M3-Plate-Recognition

  车牌识别,FPGA,2019全国大学生集成电路创新创业大赛

  Language:VHDL1273221

• XueTianyu24/cnn_accelerator

  【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器

  Language:Verilog1252126

• odin2985/FPGA-CNN-accelerator-based-on-systolic-array

  2023集创赛国二，紫光同创杯。基于脉动阵列写的一个简单的卷积层加速器，支持yolov3-tiny的第一层卷积层计算，可根据FPGA端DSP资源灵活调整脉动阵列的结构以实现不同的计算效率。

  Language:Verilog110219

• arasi15/CNN-Accelerator-Implementation-based-on-Eyerissv2

  Language:Verilog910010

• reece15/cnn_face_detection

  基于cnn神经网络人脸识别 实现的考勤demo项目。ui采用pyqt5，实现了简单的录入人脸，人脸检测，人脸识别。

  Language:Python562218

• hfwang132/lenet-hls-pynq

  LeNet5 on PYNQ via HLS

  Language:C++39101

• abdelrhman-oun/DDR5_PHY_WriteOperation

  Language:SystemVerilog334011

• lerogo/5-stage-pipeline-cpu

  实现了5段流水的CPU This project is verilog that implements 5-stage-pipeline-cpu

  Language:Verilog29104

• jinghaiting/binary_classification_keras

  keras使用迁移学习实现医学图像二分类（AK、SK）

  Language:Python263

• CodeNameGrapefruit/SoC_CNN

  Convolutional Neural Network Implemented in Verilog for System on Chip

  Language:Verilog21013

• djsaber/Keras-ViT

  基于Keras实现ViT模型，通过预训练权重在cifar-10数据集进行fine tuning，对图像分类准确率测试。

  Language:Python7212

• ci-ke/simple-MIPS-CPU

  《数字设计和计算机体系结构（原书第2版）》第7章的实现

  Language:Assembly4101