This repository contains open source board and FPGA designs associated with the Parallella project.
The Parallella board is open source hardware. The table belo
| Board | Description |
|---|---|
| parallella-gen1 | Parallella Kickstarter board currently in production |
| porcupine | Breakout board |
| parallella-template | KiCad template board for creating daughter cards |
| parallella-gen2 | The next Parallella board (work in progress...) |
The table below contains links to some of the key blocks used by the Parallella. The complete source tree can be found in "fpga/src"
| Board | Description |
|---|---|
| elink | Top level of elink physical interface used by the Epiphany |
| ecfg | elink configuration register file |
| erx | elink receiver |
| etx | elink transmitter |
| embox | Fifo based mailbox with interrupt output |
| emmu | Memory address translation unit |
| emaxi | AXI master interface |
| esaxi | AXI slave interface |
Unless otherwise specified the parallella-hw project uses the GPLv3 for RTL code and Creative Common Share Alike for board design files. The GPLv3 license notice can be found at the bottom of the file.
##Contribution We are looking for external contribution to to the Parallella project! If you have something to contribute in the area of board, system, FPGA design, dig in! All pull requests will be considered. Instructions for contributing can be found HERE.