This extension add language support for VHDL, based on the 2008 standard. Also includes syntax highlighting of constants, types and functions for the following standard packages:
- STD
- standard
- env
- textio
- IEEE
- std_logic_1164
- numeric_std
- math_real
- math_complex
- float_pkg
- fixed_pkg
The core grammar definition has been written in YAML, to allow easier maintenance and contributions. It has been designed to be as permissive as possible, whilst enforcing syntactically correct design units and control statements.
- Syntax highlighting of VHDL files up to the 2008 standard.
- Snippets:
- Primary & Secondary Units.
if/case/for/generate.- Range types:
std_logic_vector/signed/unsigned.
- Completions:
- Standard libraries & packages (STD, IEEE).
- Control Statement Snippets
- Completions
- Symbol Extraction
This is extension is under active development, and changes in each release are documented in the CHANGELOG
Copyright (c) 2019 Rich J. Young