Pinned Repositories
0402py
100-repoopen-lane
100DaysOfRTL
100 Days of RTL
2021_Spring_NCTU_ICLAB
NCTU 2021 Spring Integrated Circuit Design Laboratory
2023_Spring_NCTU_ICLAB
NCTU 2023 Spring Integrated Circuit Design Laboratory
32-Verilog-Mini-Projects
Implementing 32 Verilog Mini Projects. 32 bit adder, Array Multiplier, Barrel Shifter, Binary Divider 16 by 8, Booth Multiplication, CRC Coding, Carry Select and Carry Look Ahead Adder, Carry Skip and Carry Save Adder, Complex Multiplier, Dice Game, FIFO, Fixed Point Adder and Subtractor, Fixed Point Multiplier and Divider, Floating Point IEEE 754 Addition Subtraction, Floating Point IEEE 754 Division, Floating Point IEEE 754 Multiplication, Fraction Multiplier, High Radix Multiplier, I2C and SPI Protocols, LFSR and CFSR, Logarithm Implementation, Mealy and Moore State Machine Implementation of Sequence Detector, Modified Booth Algorithm, Pipelined Multiplier, Restoring and Non Restoring Division, Sequential Multiplier, Shift and Add Binary Multiplier, Traffic Light Controller, Universal_Shift_Register, BCD Adder, Dual Address RAM and Dual Address ROM
4K_60fps_ME
Motion Vector Estimaion on 4K@60fps Video 运动向量估计硬件电路设计
Advanced-Physical-Design-Using-OpenLANE-Sky130
This repository documents my work from the Advanced Physical Design Using OpenLANE/Sky130 Workshop conducted by VLSI System Design. The objective of this workshop project was to implement an opensource RTL2GDS flow using OpenLANE and opensource PDK provided by Google/SkyWater130
Advanced-Physical-Design-Using-Openlane-Sky130-1
Advanced Physical Design using Openlane Sky130_ver2
advanced_openlane_workshop-documentation
Its a workshop conducted by VSD team
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