Pinned Repositories
0402py
100-repoopen-lane
100DaysOfRTL
100 Days of RTL
2021_Spring_NCTU_ICLAB
NCTU 2021 Spring Integrated Circuit Design Laboratory
2023_Spring_NCTU_ICLAB
NCTU 2023 Spring Integrated Circuit Design Laboratory
32-Verilog-Mini-Projects
Implementing 32 Verilog Mini Projects. 32 bit adder, Array Multiplier, Barrel Shifter, Binary Divider 16 by 8, Booth Multiplication, CRC Coding, Carry Select and Carry Look Ahead Adder, Carry Skip and Carry Save Adder, Complex Multiplier, Dice Game, FIFO, Fixed Point Adder and Subtractor, Fixed Point Multiplier and Divider, Floating Point IEEE 754 Addition Subtraction, Floating Point IEEE 754 Division, Floating Point IEEE 754 Multiplication, Fraction Multiplier, High Radix Multiplier, I2C and SPI Protocols, LFSR and CFSR, Logarithm Implementation, Mealy and Moore State Machine Implementation of Sequence Detector, Modified Booth Algorithm, Pipelined Multiplier, Restoring and Non Restoring Division, Sequential Multiplier, Shift and Add Binary Multiplier, Traffic Light Controller, Universal_Shift_Register, BCD Adder, Dual Address RAM and Dual Address ROM
4K_60fps_ME
Motion Vector Estimaion on 4K@60fps Video 运动向量估计硬件电路设计
Advanced-Physical-Design-Using-OpenLANE-Sky130
This repository documents my work from the Advanced Physical Design Using OpenLANE/Sky130 Workshop conducted by VLSI System Design. The objective of this workshop project was to implement an opensource RTL2GDS flow using OpenLANE and opensource PDK provided by Google/SkyWater130
Advanced-Physical-Design-Using-Openlane-Sky130-1
Advanced Physical Design using Openlane Sky130_ver2
advanced_openlane_workshop-documentation
Its a workshop conducted by VSD team
korsh84's Repositories
korsh84/100DaysOfRTL
100 Days of RTL
korsh84/2021_Spring_NCTU_ICLAB
NCTU 2021 Spring Integrated Circuit Design Laboratory
korsh84/2023_Spring_NCTU_ICLAB
NCTU 2023 Spring Integrated Circuit Design Laboratory
korsh84/asap7_reference_design
reference block design for the ASAP7nm library in Cadence Innovus
korsh84/asap7_snps
Supplemental technology files for ASAP7 PDK with Synopsys design flow
korsh84/AsicMethadology
korsh84/Characterization
Digital flow for component characterization ML machine
korsh84/core-to-core-latency
Measures the latency between CPU cores
korsh84/corsair
Control and Status Register map generator for HDL projects
korsh84/DEHNN
Github repository of the AIStats 2024 paper: DE-HNN: An effective neural model for Circuit Netlist representation
korsh84/DTMF-Receiver-Logic-Synthesis-and-Physical-Design-
DTMF Receiver: Logic Synthesis and Physical Design using genus and innovus in 90nm process node
korsh84/duckwizard
duckWizard: RTL Development Framework
korsh84/edalize
An abstraction library for interfacing EDA tools
korsh84/ICLab
2023 Spring ICLab
korsh84/iic-osic-tools
IIC-OSIC-TOOLS is an all-in-one Docker container for SKY130-based analog and digital chip design. It runs on x86_64/amd64 and aarch64/arm64.
korsh84/iob-soc
RISC-V System on Chip Template
korsh84/lsfMonitor
A toop for LSF data-collection, data-analysis and information display.
korsh84/MacroPlacement
Macro Placement - benchmarks, evaluators, and reproducible results from leading methods in open source
korsh84/n64adv2_fw
sdc example
korsh84/OpenLane_Automated_Installation
Shell Scripts to Automate installation of OpenLane and Dependencies
korsh84/OpenROAD-Eder
Eder - Antenna OpenROAD's unified application implementing an RTL-to-GDS Flow
korsh84/PROBE3.0
korsh84/public
korsh84/RuEDAGlossary
korsh84/siliconcompiler
A modular build system for hardware
korsh84/sky130_cds
This repository is an open-source version of SKY130 to help facilitate use of Cadence Design System tools for use with Skywater 130 Process Design Kit
korsh84/TCL-programming
korsh84/test
korsh84/vlsistuff
ideas and eda software for vlsi design
korsh84/VSDBabySoC_ICC2