Pinned Repositories
biriscv
biRISC-V - 32-bit dual issue RISC-V CPU Software Environment
callgraph-gen
Generating the call graph from elf binary file
cfront-3
self education and historical research of the C++ compiler cfront v3
cjtag_bridge
🔌 Compact JTAG ("cJTAG") to 4-wire JTAG (IEEE 1149.1) bridge.
elfread
elfreader, dump section names
FreeRTOS-BTF-Trace
Generate BTF trace file for FreeRTOS
FreeRTOS-RISCV
An example to test srv32 RISC-V core on FreeRTOS
incbin
include a binary file in C
pipeutils
A basic component for pipelined control
srv32
Simple 3-stage pipeline RISC-V processor
kuopinghsu's Repositories
kuopinghsu/srv32
Simple 3-stage pipeline RISC-V processor
kuopinghsu/callgraph-gen
Generating the call graph from elf binary file
kuopinghsu/biriscv
biRISC-V - 32-bit dual issue RISC-V CPU Software Environment
kuopinghsu/FreeRTOS-RISCV
An example to test srv32 RISC-V core on FreeRTOS
kuopinghsu/incbin
include a binary file in C
kuopinghsu/cfront-3
self education and historical research of the C++ compiler cfront v3
kuopinghsu/elfread
elfreader, dump section names
kuopinghsu/FreeRTOS-barectf
FreeRTOS tracing using BareCTF and Trace Compass
kuopinghsu/FreeRTOS-BTF-Trace
Generate BTF trace file for FreeRTOS
kuopinghsu/pipeutils
A basic component for pipelined control
kuopinghsu/ara
Dhrystone and Coremark for Ara
kuopinghsu/cjtag_bridge
🔌 Compact JTAG ("cJTAG") to 4-wire JTAG (IEEE 1149.1) bridge.
kuopinghsu/iob-cache
Verilog configurable cache
kuopinghsu/NuttX-RISCV
NuttX for simple-riscv porting
kuopinghsu/riscv-arch-test
kuopinghsu/riscv_fpga
RISCV for Embedfire mini