The value of DEF_TX_BW
zpchya opened this issue · 1 comments
zpchya commented
why the value of DEF_TX_BW is 128? Although when the size of tx queue up to 128, RDMA_write has the maximum dandwidth performance by tests, but I don't know why?
HassanKhadour commented
Hi @zpchya,
Perftest exists for a long time and supports huge number of nics, old and new, So each card can have different bw results when using different tx depth's, but we are using 128 as a default for BW for all.