Issues
- 2
[CombToSMT] Func dialect dependency is missing
#7096 opened by uenoku - 2
- 3
- 3
[SV] Add `fopen` and `fclose`
#7092 opened by SpriteOvO - 0
[SV] BindOp::verifySybmolUses could be expensive
#7094 opened by uenoku - 4
[HGLDD] Emit HW struct and array types
#6816 opened by fabianschuiki - 0
[CI] Update github actions to use node.js 20
#7080 opened by youngar - 1
[OM] Rework Class and Object op to finish the move away from fields being symbols
#7078 opened by mikeurbach - 0
- 0
[Arc] Allow uniform operands to the VectorizeOp
#7070 opened by fabianschuiki - 0
[FIRRTL] Don't put names on constants
#7064 opened by darthscsi - 3
[FIRRTL] LowerMemory change in #6719 leads to ambiguous targets in EmitOMIR
#6830 opened by mikeurbach - 0
Duplicate hw.hierpath being created
#7063 opened by darthscsi - 1
[Calyx] Verified-valid IR crashes in canonicalizer
#7051 opened by dtzSiFive - 2
`-DMLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS=ON` might have found some invalid API usages
#7047 opened by 7FM - 1
- 2
- 0
- 1
Factor out ClockEdgeAttr definitions
#7034 opened by fabianschuiki - 1
- 0
[PyCDE,Ibis] Crash on no-argument method wrapping
#6968 opened by mortbopet - 0
- 2
Elaborate chisel type annotation from firtool to generate debug information for the Tywaves project
#6983 opened by rameloni - 2
[Arc] Generates signalling code
#6938 opened by hovind - 0
[FIRRTL] Performance Degradation in Dedup Runtime between Chisel3.6 and Chisel6
#6979 opened by Heaton15 - 1
[FIRRTL] sizeof intrinsic doesn't work on bundles
#6927 opened by dtzSiFive - 2
[FIRRTL] isX lowering doesn't work for bundles
#6926 opened by dtzSiFive - 0
Printf-encoded verification deprecation
#6970 opened by dtzSiFive - 1
- 0
[FIRRTL][ExportVerilog] Signed Division Bug
#6961 opened by seldridge - 0
[HW] Inner symbols dropped by InlineModules
#6967 opened by uenoku - 1
- 9
[FIRRTL][InferWidths] When there is no unique minimal solution for width constraints, what should be the width?
#6924 opened by wky17 - 1
[Python][HW] hw.WireOp inner_sym is inconvenient to use
#6954 opened by nickelpro - 0
- 2
- 0
- 0
Duplicate expressions possibly due to spilled event control expressions in LTL statements
#6930 opened by jackkoenig - 1
Looking for circt==1.48.1.dev34
#6925 opened by rkshthrmsh - 3
[FIRRTL] ‘firtool’ crashes with an error when receives a ‘fir’ file with no main module
#6922 opened by iagrigorov - 2
[FIRRTL] Not generate "automatic logic" in the output SystemVerilog file
#6919 opened by SinaKarvandi - 1
- 0
[firrtl] extmodules with HasBlackBoxInline instantiated only in a layer not emitted into layers location
#6880 opened by mwachs5 - 5
[OM] parsing depend on the ordering of Class
#6866 opened by sequencer - 0
[SV] SVExtractTestCode not Extracting Assert Properties
#6864 opened by seldridge - 15
[Arc] Add basic assertion support
#6810 opened by fabianschuiki - 0
Wiring problem error with const source and non-const sink w/no-ref-type option
#6819 opened by dtzSiFive - 1
- 2
[CI] LLVM Rebuild configuration suddenly broken?
#6808 opened by maerhart - 0
[FIRRTL] Add back owning module constraint for local targets after removing use of ExtractInstances
#6812 opened by mikeurbach