lotuscoco

Pinned Repositories

e200_opensource
The Ultra-Low Power RISC Core
Language:Verilog00
NVmain
NVMain - An Architectural Level Main Memory Simulator for Emerging Non-Volatile Memories
Language:C++00
NVSim
NVSim - A performance, energy and area estimation tool for non-volatile memory (NVM)
Language:C++00
os_tutorial_lab
tutorial labs for os course
Language:C00
picorv32
PicoRV32 - A Size-Optimized RISC-V CPU
Language:Verilog00
serv
SERV - The SErial RISC-V CPU
Language:Verilog00
ucore_os_lab
os kernel labs for operating systems course in Tsinghua University.
Language:C00

lotuscoco's Repositories

lotuscoco/serv
SERV - The SErial RISC-V CPU
Language:Verilog
lotuscoco/picorv32
PicoRV32 - A Size-Optimized RISC-V CPU
Language:Verilog
lotuscoco/ucore_os_lab
os kernel labs for operating systems course in Tsinghua University.
Language:C
lotuscoco/e200_opensource
The Ultra-Low Power RISC Core
Language:Verilog
lotuscoco/NVmain
NVMain - An Architectural Level Main Memory Simulator for Emerging Non-Volatile Memories
Language:C++
lotuscoco/NVSim
NVSim - A performance, energy and area estimation tool for non-volatile memory (NVM)
Language:C++
lotuscoco/os_tutorial_lab
tutorial labs for os course
Language:C