/VHDL_Project

A VHDL description of an FPGA that calculates the "actual" area of an input image.

Primary LanguageVHDL

VHDL Project

A VHDL description of an FPGA board that calculates the "actual" area of an input image.
The area is calculated as the smallest rectangle containing all the pixels (RAM cells) that are greater than or equal to a threshold value given as an input.