lukebachman

Pinned Repositories

• 351project1

  Language:C++00

• ALU_7_SEG_DECODER

  This repository includes the components of an ALU and a 7-Seg display decoder. It shows you how to wire the two components together using VHDL portmapping

  Language:VHDL00

• Associative-Containers-Homework

  Associative Containers Homework

  Language:C++00

• fibonacci_sequence_vhdl

  This is how you would simulate a circuit to check if a number is a part of the fibonacci sequence or not using VHDL.

  Language:VHDL00

• FPGA_Piano

  A verilog FPGA Piano that plays 5 notes from the C Major Scale.

  Language:Tcl00

• plant_keeper

  Language:C++01

• plantkeeper

  Language:HTML00

• si-fall-2019

  Exercises for Oscar's Fall 2019 SI

  Language:C++00

• Single-Digit-Stopwatch

  Design of a single-digit stopwatch using VHDL

  Language:VHDL00

lukebachman's Repositories