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lvd2/ay-3-8910_reverse_engineered
The reverse-engineered AY-3-8910 chip. Transistor-level schematics, verilog model and a testbench with tools, that can render register dump files into .flac soundtrack.
VerilogGPL-3.0
The reverse-engineered AY-3-8910 chip. Transistor-level schematics, verilog model and a testbench with tools, that can render register dump files into .flac soundtrack.
VerilogGPL-3.0
This repository is not active