maikmerten/riscv-tomthumb
A small RISC-V RV32I core written in VHDL, intended as testbed for my personal VHDL learning
VHDLMIT
Stargazers
- addisonElliottBECS Technology
- amsharifianCerebras
- AnttiLukats@micro-FPGA
- aolofssonZero ASIC Corporation
- baiyunping333guangzhou
- bhamadicharefSingapore
- bibor
- bmuzika
- bom-d-vanChina
- danielgerigkMunich, Germany
- fluxany
- ironsteelPlovdiv/Bulgaria
- jevinskieLafayette, Indiana
- krfkeith
- larsmannshardtGermany
- leeofaith
- mhorne
- mickaelfiorentinoToulouse
- mitoksimCalifornia
- msurzur
- oioeic
- ooxi
- rglennToronto, Ontario, Canada
- SebidevGermany
- sidharthp5792
- stephengeerlings
- tahasecenturkey
- tahashmi@TUDelft
- thodg@kmx-io
- xfguoJinglue Semi. (SH) Inc.
- yimingqpa
- zhutianweiRobinhood