/fpga-edu

Primary LanguageVHDL

FPGA EDU

My computer science bachelor thesis project repository.

Requirements

  • Digilent Nexys-4 board with Xilinx Artix-7 FPGA
  • Xilinx Vivado 2015.1
  • Xilinx SDK 2015.1

Installation

  • See Vivado\README.md for Xilinx Vivado installation instructions.
  • See SDK\README.md for Xilinx SDK installation instructions.