mauer4/Personal-Project-Verilog-CLOCK
This project was a nice idea I had to build a digital logic clock on the DE1-SOC FPGA, while practicing System-verilog, Asynchronous design, and advanced debugging techniques
SystemVerilog
This project was a nice idea I had to build a digital logic clock on the DE1-SOC FPGA, while practicing System-verilog, Asynchronous design, and advanced debugging techniques
SystemVerilog