milannedic
Digital Design Engineer doing ASIC design from 9 to 5. Enthusiastic about computer architecture, low level programming, DSP and FPGAs.
Novi Sad
Pinned Repositories
kfifo
kfifo, a generic userspace FIFO implementation, port from Linux kernel
kfifo-examples
Linux kernel module examples about kfifo
pcimem
Simple program to read & write to a pci device from userspace
systemc-docker
milannedic's Repositories
milannedic/pcimem
Simple program to read & write to a pci device from userspace
milannedic/kfifo
kfifo, a generic userspace FIFO implementation, port from Linux kernel
milannedic/kfifo-examples
Linux kernel module examples about kfifo
milannedic/Kria-PYNQ
milannedic/kv260_imx219_to_displayport
Raspberry Pi v2 camera (IMX219) to DisplayPort of Ultra96-V2 board through PL
milannedic/libsystemctlm-soc
SystemC/TLM-2.0 Co-simulation framework
milannedic/PYNQ_Composable_Pipeline
PYNQ Composabe Overlays
milannedic/systemc-docker
milannedic/zedboard_axi4_master_burst_example
Quick Example how to generate an custom AXI4 IP with AXI4-Full interface (burst) for the Zynq (ZedBoard)
milannedic/litex
Build your hardware, easily!
milannedic/MSREAL
Ovaj repozitorijum ce obuhvatati sav materijal koji je potreban za laboratorijske vezbe predmeta MSREAL.
milannedic/nitefury-popr
milannedic/pl-nvme
milannedic/register-mode-dma
A register mode DMA example that demonstrates moving data from a traffic generator to DDR memory
milannedic/ringbuffer
a ring buffer like kfifo, work in linux kernel and user space, test on kernel 3.16 on both x86 and ARM platform
milannedic/systemc-compiler
This tool translates synthesizable SystemC code to synthesizable SystemVerilog.
milannedic/SystemC_SVM
Building a SystemC model of hardware accelerator for SVM number recognition
milannedic/tiny-gpu
A minimal GPU design in Verilog to learn how GPUs work from the ground up
milannedic/VGA_BRAM_Controller
milannedic/xilinx_axidma
A zero-copy Linux driver and a userspace interface library for Xilinx's AXI DMA and VDMA IP blocks. These serve as bridges for communication between the processing system and FPGA programmable logic fabric, through one of the DMA ports on the Zynq processing system. Distributed under the MIT License.
milannedic/Zybo_Z710_Boot_Files