/rc5

RC5-32/12/16 hardware implementation

Primary LanguageVHDLMIT LicenseMIT

RC5 Algorithm

About

RC5 algorithm implemented in hardware on an FPGA. The algorithm is implemented on a Xilinx Zynq-7000 AP SoC XC7Z020-CLG484-1 found on the ZedBoard but does not use IP cores and can be implemented on any other FPGA.