Pinned Repositories
bfu_dif_fft_rtl
The verilog code together with cocotb testbench of BFU unit of a DIF FFT processor
nasser_chip
RISC-V-RAIV-GPGPU-docs
In this repository we host the docs of "Development of AI Framework based on RISC-V RAIV GPGPU Compatible with OpenCL" project.
simx-debug-env
debugging environment for simx
tt03-mnasser-demo
Verilog demo for Tiny Tapeout 03
picorv32
PicoRV32 - A Size-Optimized RISC-V CPU
mnasser431998's Repositories
mnasser431998/bfu_dif_fft_rtl
The verilog code together with cocotb testbench of BFU unit of a DIF FFT processor
mnasser431998/nasser_chip
mnasser431998/RISC-V-RAIV-GPGPU-docs
In this repository we host the docs of "Development of AI Framework based on RISC-V RAIV GPGPU Compatible with OpenCL" project.
mnasser431998/simx-debug-env
debugging environment for simx
mnasser431998/tt03-mnasser-demo
Verilog demo for Tiny Tapeout 03