6 Stage Processor

processor

Table of Contents

Project Description

A Harvard six stages pipelined processor that implements fullforwarding, static branch prediction and interrupt handling. A Special Compiler for compiling the instruction set commands to machine code.

Final Design

Processor Design

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Technologies

  • VHDL used for implementing the processor
  • C++ used for implementing the compiler

How to use

  1. Create a project using modelsim and add all vhdl files.
  2. Compile all files.
  3. Run compiler.cpp on your desired code.
  4. Copy any do file and edit the memory importing command and any intializations.
  5. Run your do file and Watch your code in action.

References

You can find more about the project specifics in the project document and reference textbook.

  • Project Description
  • Computer Organization and Design - Fifth Edition - David A. Patterson & John L. Hennessy

Contributors

  1. Salah Abotalebl
  2. Moaaz Tarek
  3. Hussein Elhawary
  4. Omar Elzahar