mrcmry

Myotest

Pinned Repositories

mediapipe-rs-vinlemon
The Google mediapipe AI library. Write AI inference applications for image recognition, text classification, audio / video processing and more, in Rust and run them in the secure WasmEdge sandbox. Zero Python dependency!
Language:Rust00
riscv-isa-sim
Spike, a RISC-V ISA Simulator
Language:C00
rvls
RISCV lock-step checker based on Spike
Language:C++00
Spinal-bootcamp
SpinalHDL-tutorial based on Jupyter Notebook
Language:Jupyter Notebook0 0 00
SpinalDoc-RTD
The sources of the online SpinalHDL doc
Language:Python0 0 00
SpinalHDL
Scala based HDL
Language:Scala00
SpinalWorkshop
Labs to learn SpinalHDL
Language:Scala0 0 00
VexiiRiscv
Like VexRiscv, but, Harder, Better, Faster, Stronger
Language:Scala00
VexiiRiscv-RTD
Language:Python00
VexRiscv
A FPGA friendly 32 bit RISC-V CPU implementation
Language:Assembly0 0 00

mrcmry's Repositories

mrcmry/mediapipe-rs-vinlemon
The Google mediapipe AI library. Write AI inference applications for image recognition, text classification, audio / video processing and more, in Rust and run them in the secure WasmEdge sandbox. Zero Python dependency!
Language:Rust00
mrcmry/riscv-isa-sim
Spike, a RISC-V ISA Simulator
Language:C00
mrcmry/rvls
RISCV lock-step checker based on Spike
Language:C++00
mrcmry/Spinal-bootcamp
SpinalHDL-tutorial based on Jupyter Notebook
Language:Jupyter Notebook0 0 00
mrcmry/SpinalDoc-RTD
The sources of the online SpinalHDL doc
Language:Python0 0 00
mrcmry/SpinalHDL
Scala based HDL
Language:Scala00
mrcmry/SpinalWorkshop
Labs to learn SpinalHDL
Language:Scala0 0 00
mrcmry/VexiiRiscv
Like VexRiscv, but, Harder, Better, Faster, Stronger
Language:Scala00
mrcmry/VexiiRiscv-RTD
Language:Python00
mrcmry/VexRiscv
A FPGA friendly 32 bit RISC-V CPU implementation
Language:Assembly0 0 00