/LimeSDR-USB_GW

Altera Cyclone IV FPGA project for the USB 3.0 LimeSDR board

Primary LanguageVerilogApache License 2.0Apache-2.0

LimeSDR-USB FPGA gateware

This repository contains the FPGA gateware project for the USB 3.0 LimeSDR board.

The gateware can be built with the free version of the Altera Quartus tools.

Branches

This repository contains the following hardware-specific branches:

  • master:

    • Compiled gateware file for Hardware Revision 1v4 is output_files/LimeSDR-USB_lms7_trx_HW_1.4.rbf.

  • HW_v1.3-v1.0:

    • Compiled gateware file for Hardware Revision 1v3 is output_files/LimeSDR-USB_lms7_trx_HW_1.3.rbf.
    • Compiled gateware file for Hardware Revision 1v2 is output_files/LimeSDR-USB_lms7_trx_HW_1.2.rbf.
    • Compiled gateware file for Hardware Revision 1v1 is output_files/LimeSDR-USB_lms7_trx_HW_1.1.rbf.
    • Compiled gateware file for Hardware Revision 1v0 is output_files/LimeSDR-USB_lms7_trx_HW_1.0.rbf.

Licensing

Please see the COPYING file(s). However, please note that the license terms stated do not extend to any files provided with the Altera design tools and see the relevant files for the associated terms and conditions.