/shift_add_multiplier

A variable-size shift/add multiplier architecture in HDL

Primary LanguageVHDLApache License 2.0Apache-2.0

Shift/Add Multiplier

Description

This project was part of a university assignment concerning hardware architectures. It implements a variable-size shift/add multiplier architecture in HDL

The authors of this project are (in alphabetical order):

  • George Evangelou (Dipl. Eng. Electrical and Computer Engineering Department, Univ. of Patras, Greece)
  • Nick Roussos (Dipl. Eng. Electrical and Computer Engineering Department, Univ. of Patras, Greece)

This repository is work in progress. Please contact the authors for any issue.