Pinned Repositories
basic_uvmc
A simple testbench with two refmods using UVM Connect
basic_uvmc_oct
A simple UVM testbench using UVM Connect and Octave
easyUVM
A simple UVM example with DPI
FFT
Hardware implementation of a Fixed Point Recursive Forward and Inverse FFT algorithm
FIR_FILTER
FIR Filter Generation and Audio Processing in Altera DE2
ISP_UVM
A Framework for Design and Verification of Image Processing Applications using UVM
smarts
This repository contains several examples and problems in Modern Control including: neural networks, expert systems, genetic algorithms.The codes are implemented in Matlab/Octave and CLIPS. Each task has its own description in a pdf report. The overview of the all tasks can be seen in the file smarts.pdf
sv_image
Reusable image processing modules in SystemVerilog
sv_math
Reusable math modules (multiplication, division, square root and logarithm) in SystemVerilog
systems-id
This repository contains several examples and problems in Systems Identification and Estimation.The codes are implemented in Matlab/Octave.
nelsoncsc's Repositories
nelsoncsc/ISP_UVM
A Framework for Design and Verification of Image Processing Applications using UVM
nelsoncsc/easyUVM
A simple UVM example with DPI
nelsoncsc/sv_image
Reusable image processing modules in SystemVerilog
nelsoncsc/FFT
Hardware implementation of a Fixed Point Recursive Forward and Inverse FFT algorithm
nelsoncsc/basic_uvmc_oct
A simple UVM testbench using UVM Connect and Octave
nelsoncsc/sv_math
Reusable math modules (multiplication, division, square root and logarithm) in SystemVerilog
nelsoncsc/basic_uvmc
A simple testbench with two refmods using UVM Connect
nelsoncsc/FIR_FILTER
FIR Filter Generation and Audio Processing in Altera DE2
nelsoncsc/smarts
This repository contains several examples and problems in Modern Control including: neural networks, expert systems, genetic algorithms.The codes are implemented in Matlab/Octave and CLIPS. Each task has its own description in a pdf report. The overview of the all tasks can be seen in the file smarts.pdf
nelsoncsc/systems-id
This repository contains several examples and problems in Systems Identification and Estimation.The codes are implemented in Matlab/Octave.
nelsoncsc/ADUC_7026
This repository contains an implementation of the Protocol I2C using the microncontroller ADUC 7026. The communication is between one master with two slaves.
nelsoncsc/basicSV
Very basic SystemVerilog examples
nelsoncsc/cello
Genetic circuit design automation
nelsoncsc/gameboy
Exploring Game Boy programming techniques.
nelsoncsc/hls_tutorials
Tutorials on HLS Design
nelsoncsc/keras
Deep Learning library for Python. Convnets, recurrent neural networks, and more. Runs on TensorFlow or Theano.
nelsoncsc/QuartusBuildVMs
Details for installing Quartus on Linux (via VMs and Docker containers) to create build machines for Altera FPGA projects
nelsoncsc/UPF-Demo
Unified Power Format Demo (in System Verilog and UPF)
nelsoncsc/litex
Build your hardware, easily!
nelsoncsc/nelsoncsc
Config files for my GitHub profile.
nelsoncsc/nelsoncsc.github.io
sistenix.com
nelsoncsc/red-pitaya-notes
Notes on the Red Pitaya Open Source Instrument
nelsoncsc/verilog-axis
Verilog AXI stream components for FPGA implementation