/FABulous_eFPGA_wb

FABulous eFPGA with wishbone interface (gg-mpw7-2022)

Primary LanguageVerilogApache License 2.0Apache-2.0

Caravel User Project

License UPRJ_CI Caravel Build

❗ Important Note
This project demonstrates open source eFPGA generated by FABulous. This version is to support wishbone interface with updated DSP tiles. The design was implemented in Sky130nm using OpenLane flow.