nickfox-taterli's Stars
boosterl/awesome-mango-pi-mq-pro
A curated list of awesome MangoPi MQ-Pro images, tools and resources
QQxiaoming/quard_star_tutorial
This project aims to build an Embedded Linux System, in order to analyze the chip from the power-on execution of the first instruction to the entire system running, based on qemu simulator development board. 本项目旨在真正从0开始构建嵌入式linux系统,为了剖析芯片从上电开始执行第一条指令到整个系统运行,基于qemu定制模拟器开发板。
espressif/esp-hosted
Hosted Solution (Linux/MCU) with ESP32 (Wi-Fi + BT + BLE)
dusty-nv/jetson-inference
Hello AI World guide to deploying deep-learning inference networks and deep vision primitives with TensorRT and NVIDIA Jetson.
THUDM/ChatGLM3
ChatGLM3 series: Open Bilingual Chat LLMs | 开源双语对话语言模型
polhenarejos/pico-hsm
Hardware Security Module (HSM) for Raspberry Pico and ESP32
sophgo/sophgo-doc
xiaowuzxc/SparrowRV
An embed RISC-V Core with RV32IMZicsr ISA named SparrowRV.
corundum/corundum
Open source FPGA-based NIC and platform for in-network compute
maswx/vu13p
国产VU13P加速卡资料
AiLiaa/Live2DVtuber
基于Python+Unity实现的动捕Vtuber
tillitis/tillitis-key1
Board designs, FPGA verilog, firmware for TKey, the flexible and open USB security key 🔑
lupyuen/nuttx-ox64
Apache NuttX RTOS for Pine64 Ox64 64-bit RISC-V SBC (BouffaloLab BL808)
vossstef/tang_nano_20k_c64
Commodore C64 core for the Tang Nano 20K Primer 25K Mega 60k and Mega 138K Pro FPGA
uPesy/easyeda2kicad.py
Convert any LCSC components (including EasyEDA) to KiCad library
nickfox-taterli/catapult-v3-smartnic-re
Documenting the Catapult v3 SmartNIC FPGA boards (Dragontails Peak & Longs Peak)
alexforencich/verilog-pcie
Verilog PCI express components
alexforencich/verilog-i2c
Verilog I2C interface for FPGA implementation
splinedrive/kianRiscV
RISC-V Linux SoC, marchID: 0x2b
coderonion/awesome-cuda-and-hpc
🔥🔥🔥 A collection of some awesome public CUDA, cuBLAS, TensorRT and High Performance Computing (HPC) projects.
enjoy-digital/litesata
Small footprint and configurable SATA core
niumoo/bing-wallpaper
必应每日超清壁纸(4K) Bing Daily Wallpaper (4K)
osrg/gobgp
BGP implemented in the Go Programming Language
nand2mario/nestang
NESTang is an FPGA Nintendo Entertainment System implemented with Sipeed Tang Primer 25K, Nano 20K and Primer 20K boards
darklife/darkriscv
opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
YosysHQ/picorv32
PicoRV32 - A Size-Optimized RISC-V CPU
stnolting/neorv32
:desktop_computer: A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
diodep/ch55x_jtag
CH55x USB to JTAG bridge
m-labs/migen
A Python toolbox for building complex digital hardware
Arduinolibrary/MXChip-Microsoft-Azure-IoT-Developer-Kit
MXChip-Microsoft-Azure-IoT-Developer-Kit