nielshaandbaek

Pinned Repositories

vscode-dbt-hdl
VSCode plugin or DBT HDL flow
Language:TypeScript10
atom-aligner-vhdl
VHDL support for atom-aligner
Language:CoffeeScript00
dma_ip_drivers
Xilinx QDMA IP Drivers
Language:C00
gtkwave
GTKWave is a fully featured GTK+ based wave viewer for Unix and Win32 which reads LXT, LXT2, VZT, FST, and GHW files as well as standard Verilog VCD/EVCD files and allows their viewing.
Language:C00
hover.nvim
Hover plugin framework for Neovim
Language:Lua00
kickstart.nvim
A launch point for your personal nvim configuration
Language:Lua00
language-vhdl
VHDL language support in Atom
00
PycQED_py3
Python3 version of PycQED using QCeDeS as backend
Language:Python00
pysysim
System simulation framework based on SimPy
Language:Python00
regolith-rofication
Notification system that provides a Rofi front-end
Language:Python00

nielshaandbaek's Repositories

nielshaandbaek/tree-sitter-verilog
Verilog grammar for tree-sitter
Language:C
nielshaandbaek/hover.nvim
Hover plugin framework for Neovim
Language:Lua
nielshaandbaek/kickstart.nvim
A launch point for your personal nvim configuration
Language:Lua
nielshaandbaek/svls
SystemVerilog language server
Language:Rust
nielshaandbaek/svlint
SystemVerilog linter
Language:Rust
nielshaandbaek/verilator
Verilator open-source SystemVerilog simulator and lint system
Language:C++
nielshaandbaek/vit.cpp
Inference Vision Transformer (ViT) in plain C/C++ with ggml
nielshaandbaek/dma_ip_drivers
Xilinx QDMA IP Drivers
Language:C
nielshaandbaek/verible
Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, and formatter.
Language:C++
nielshaandbaek/gtkwave
GTKWave is a fully featured GTK+ based wave viewer for Unix and Win32 which reads LXT, LXT2, VZT, FST, and GHW files as well as standard Verilog VCD/EVCD files and allows their viewing.
Language:C
nielshaandbaek/regolith-rofication
Notification system that provides a Rofi front-end
nielshaandbaek/pysysim
System simulation framework based on SimPy
Language:Python
nielshaandbaek/vscode-dbt-hdl
VSCode plugin or DBT HDL flow
Language:TypeScript1
nielshaandbaek/VSCode-SystemVerilog
SystemVerilog support in VS Code
nielshaandbaek/vunit
VUnit is a unit testing framework for VHDL/SystemVerilog
nielshaandbaek/PycQED_py3
Python3 version of PycQED using QCeDeS as backend
Language:Python
nielshaandbaek/atom-aligner-vhdl
VHDL support for atom-aligner
Language:CoffeeScript
nielshaandbaek/language-vhdl
VHDL language support in Atom