Pinned Repositories
100DaysOfRTL
2048-AI
The iconic 2048 game combined with an AI bot for finishing it in the most efficient mannerr
8bitcomputer
Eklavya project to simulate and build Ben Eaters 8 Bit COmputer
Block_Based_Circuit_Design
GSoC 2021, FOSSi Foundation
Certificates
riscv-cpu-core
A pipelined RISC-V CPU Core Implemented in Makerchip using TL-Verilog
SPI
tinder_bot_swiper
using selenium and chromedriver create a python program to automate the tinder process
USB-Component-Tester
A project under the tutelage of SRA VJTI
verilog-examples
test code for anyone learning the language verilog
ninja3011's Repositories
ninja3011/Block_Based_Circuit_Design
GSoC 2021, FOSSi Foundation
ninja3011/riscv-cpu-core
A pipelined RISC-V CPU Core Implemented in Makerchip using TL-Verilog
ninja3011/SPI
ninja3011/verilog-examples
test code for anyone learning the language verilog
ninja3011/100DaysOfRTL
ninja3011/Certificates
ninja3011/chisel-examples
ninja3011/flexus
Contains the code for the Flexus cycle-accurate simulator, used in QFlex.
ninja3011/fos-proposals
:gift_heart: :penguin: Archive of GSoC proposals
ninja3011/gecko-dev-riscv
Read-only Git mirror of the Mercurial gecko repositories at https://hg.mozilla.org. How to contribute: http://bit.ly/contribute-code
ninja3011/Intro_to_CV
SRA's seminar on Introduction to Computer Vision Fundamentals
ninja3011/libqflex
Contains the API used for interfacing between QEMU and Flexus.
ninja3011/Ninad-Jangle
ninja3011/ninja3011.github.io
Portfolio website codebase for ninadjangle.com
ninja3011/Obstacle-Avoidance-using-ROS-and-Gazebo
A VJTI SRA problem statement
ninja3011/ombhilare999.github.io
https://omkarbhilare.tech/
ninja3011/PortfolioSite
ninja3011/qemu
Official QEMU mirror. Please see https://www.qemu.org/contribute/ for how to submit changes to QEMU. Pull Requests are ignored. Please only use release tarballs from the QEMU website.
ninja3011/qflex
Quick & Flexible Rack-Scale Computer Architecture Simulator
ninja3011/React-Snippets
JPMC
ninja3011/React-TODO
ninja3011/risc-v-core
This project was done as a part of RISC-V based MYTH (Microprocessor for you in Thirty Hours) workshop organized by Kunal Ghosh and Steve Hoover
ninja3011/riscv-core
A customized RISCV core made using verilog
ninja3011/riscv-gnu-toolchain
GNU toolchain for RISC-V, including GCC
ninja3011/riscv-simple-sv
A simple RISC V core for teaching
ninja3011/sra-vjti.github.io
Repository for SRA Website
ninja3011/th_22_Ninasur
ninja3011/try-react
ninja3011/Wall-E_v2.2-beta
Development Repository for Wall-E v2.2
ninja3011/WebDevBootCamp-2.0-Colt-Steele