Pinned Repositories
CellProfileSeperationByMATLAB
This Project includes the several Image Process and Machine Learning Methodto seperate the different types of cell from a microscope image.
coremark
CoreMark® is an industry-standard benchmark that measures the performance of central processing units (CPU) and embedded microcrontrollers (MCU).
CustomRISC-V_LLVM_Backend
This is a simple tutorial to show LLVM-Backend Steps.
cva6
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
DarkArduinoTheme
A dark theme for the Arduino IDE – no longer maintained :(
FingerPen-Mouse
This project includes the IMU based mouse design, code, and related documents to draw in computer easily.
ghidra
Ghidra is a software reverse engineering (SRE) framework
GreenRio2
hammer
Infrastructure to drive Spike (RISC-V ISA Simulator) in cosim mode. Hammer provides a C++ and Python interface to interact with Spike.
i2cdevlib
I2C device library collection for AVR/Arduino or other C++-based MCUs
omerguzelelectronicguy's Repositories
omerguzelelectronicguy/CustomRISC-V_LLVM_Backend
This is a simple tutorial to show LLVM-Backend Steps.
omerguzelelectronicguy/CellProfileSeperationByMATLAB
This Project includes the several Image Process and Machine Learning Methodto seperate the different types of cell from a microscope image.
omerguzelelectronicguy/coremark
CoreMark® is an industry-standard benchmark that measures the performance of central processing units (CPU) and embedded microcrontrollers (MCU).
omerguzelelectronicguy/cva6
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
omerguzelelectronicguy/DarkArduinoTheme
A dark theme for the Arduino IDE – no longer maintained :(
omerguzelelectronicguy/FingerPen-Mouse
This project includes the IMU based mouse design, code, and related documents to draw in computer easily.
omerguzelelectronicguy/ghidra
Ghidra is a software reverse engineering (SRE) framework
omerguzelelectronicguy/GreenRio2
omerguzelelectronicguy/hammer
Infrastructure to drive Spike (RISC-V ISA Simulator) in cosim mode. Hammer provides a C++ and Python interface to interact with Spike.
omerguzelelectronicguy/i2cdevlib
I2C device library collection for AVR/Arduino or other C++-based MCUs
omerguzelelectronicguy/MipsBasedSimpleCpu
This work is just to understand to design of a cpu. It has single cycle 16-bit MiPS based architecture.
omerguzelelectronicguy/omerguzelelectronicguy
Config files for my GitHub profile.
omerguzelelectronicguy/openpiton
The OpenPiton Platform
omerguzelelectronicguy/riscv-arch-test
omerguzelelectronicguy/riscv-coremark
Setup scripts and files needed to compile CoreMark on RISC-V
omerguzelelectronicguy/riscv-isa-sim
Spike, a RISC-V ISA Simulator
omerguzelelectronicguy/riscv-tests
omerguzelelectronicguy/vortex
omerguzelelectronicguy/yingmanwumen