open-power/snap

NVMe: high level model - review findings

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Comments gathered during review of nvme_top_i.sv:

  • Handling of error conditions for NVMe read and write operations is missing.
  • Is it possible to remove the #1 operation at the end of tasks nvme_cmd_read and `nvme_cmd_write?
  • Should we remove the unused task ddr_axi_test?
  • Is task axi_ddr_reset required?
  • Set ACT_bresp and ACT_rresp to 2'hx together with releasing of ACT_bvalid and ACT_rvalid
  • Add support for NVMe host admin registers
  • Add NVMe lite model description (copy README.md from ibm github)
  • Action Register Write Statemachine: Probably need to delay issuing of nvme_operation() in state WRITE_BUFFER similar to the WRITE_BURST implementation