OpenRISC

Pinned Repositories

doc
Misc documentation and specifications
11 10 010
linux
Linux kernel source tree
Language:C29 13 514
llvm-or1k
LLVM backend for OpenRISC 1000
Language:LLVM28 12 07
mor1kx
mor1kx - an OpenRISC 1000 processor IP core
Language:Verilog503 67 62147
newlib
newlib OpenRISC development
Language:C24 12 824
or1200
OpenRISC 1200 implementation
Language:Verilog162 20 271
or1k_marocchino
OpenRISC processor IP core based on Tomasulo algorithm
Language:Verilog29 11 411
or1ksim
The OpenRISC 1000 architectural simulator
Language:C72 16 743
orpsoc-cores
Core description files for FuseSoC
Language:Verilog125 41 2978
tutorials
OpenRISC Tutorials
Language:Makefile41 9 920

OpenRISC's Repositories

openrisc/mor1kx
mor1kx - an OpenRISC 1000 processor IP core
Language:Verilog503 67 62147
openrisc/or1200
OpenRISC 1200 implementation
Language:Verilog162 20 271
openrisc/orpsoc-cores
Core description files for FuseSoC
Language:Verilog125 41 2978
openrisc/or1ksim
The OpenRISC 1000 architectural simulator
Language:C72 16 743
openrisc/tutorials
OpenRISC Tutorials
Language:Makefile41 9 920
openrisc/linux
Linux kernel source tree
Language:C29 13 514
openrisc/or1k_marocchino
OpenRISC processor IP core based on Tomasulo algorithm
Language:Verilog29 11 411
openrisc/llvm-or1k
LLVM backend for OpenRISC 1000
Language:LLVM28 12 07
openrisc/newlib
newlib OpenRISC development
Language:C24 12 824
openrisc/or1k-gcc
GCC port for OpenRISC 1000
23 12 036
openrisc/or1k-src
OpenRISC 1000 port for sourceware.org's src tree (binutils, gdb, newlib, etc.)
Language:C20 14 327
openrisc/openrisc.github.io
Source for openrisc.io
Language:HTML13 17 59
openrisc/doc
Misc documentation and specifications
11 10 010
openrisc/or1k-tests
Unified OpenRISC 1000 test suite
Language:Assembly8 15 111
openrisc/clang-or1k
Clang for OpenRISC 1000
Language:C++7 8 07
openrisc/ompic
Open Multi-Processor Interrupt Controller - for OpenRISC
Language:Verilog6 8 04
openrisc/binutils-gdb
Binutils and gdb fork for OpenRISC
Language:C5 8 312
openrisc/old-openrisc-svn
Copy of the old OpenCores OpenRISC Subversion
Language:C5 6 014
openrisc/barebox
OpenRISC fork of barebox
Language:C4 8 09
openrisc/musl-cross
A small suite of scripts and patches for building musl libc cross compilers.
Language:Shell4 7 09
openrisc/or1k-glibc
glibc port for or1k
Language:C3 14 107
openrisc/intgen
An verilog core for testing CPU interrupts
Language:Verilog2 1 03
openrisc/or1k-tcltools
Language:Tcl2 5 06
openrisc/community-wiki
Community Wiki clone
1 8 27
openrisc/mor1kx-generic
mor1kx OpenRISC generic test harness support verilator and iverilog
Language:Verilog1 1 03
openrisc/rtems-source-builder
Fork of the RTEMS source builder (RSB)
Language:Python1 7 03
openrisc/gcc
This is not the project you are looking for check openrisc/or1k-gcc.
Language:C7 0
openrisc/libunwind-or1k
Zero-cost (Itanium ABI) exception handling library for OpenRISC 1000
Language:C++10 04
openrisc/or1k-headers
OR1K Common Headers
Language:Python14 02
openrisc/uClibc-or1k
uClibc for OpenRISC 1000
Language:C6 07