Computer Science/Engineering Thesis Project. This is a toolkit to automate and accelerate the design and verification of Systems on Chips (SoCs). It mainly includes a template-based tool for designing SoCs.
palindali/SoC-Design-Automation-Toolkit
Computer Science/Engineering Thesis Project. This is a toolkit to automate and accelerate the design and verification of Systems on Chips (SoCs). It mainly includes a template-based tool for designing SoCs.
Verilog