/mips

Implementation of MIPS processor in Logisim

Primary LanguageAssembly

Poject of Computer Architecture Course (Spring 2023)

Phases:

  1. A single-cycle implementation of MIPS processor
  2. Cache memory added to a single-cycle implementation of the MIPS processor
  3. Pipelined implementation of MIPS processor
  4. Branch Prediction using Saturation Counter in Pipelined implementation of MIPS processor

Bonus point: Resolving data hazards using "forwarding" method

Team Member Student ID
AmirHossein Razlighi 99102423
Mohammad Parsa Bashari 400104812
Mohsen Ghasemi 400105166