parthpower/aes-fpga

AES implementation on FPGA

AES on FPGA (need a catchy name)

AES Encryption implementation on FPGA including standard interfaces for data transfer. I will mostly use Xilinx ISE, Spartan6 XC6SLX9 of Numato Mimas V2 target.

That's it...

Okay, I should document in more detail, but first VHDL.

Distributed under Apache 2.0 license