Project of 'Laboratórios de Sistemas Digitais' - Reaction Time Chronometer
This is a simple reaction time chronometer coded in VHDL. After you copy it to your FPGA, just press the start button (KEY0) and wait for the start signal. After you see the green light appear, click on KEY0 as fast as you can.
You can mute the FPGA using the SW0 and set the waiting time until de green light appears to 5 seconds using the SW1.